Verification of Very Large Digital Designs

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Note: This course is not available for the current semester.

Course No: EECE.5770; Last Offered: Spring 2021;

Course Description

The increasing complexity of digital designs coupled with the requirement for first pass success creates a need for an engineered approach to verification. This course defines the goals for verification, presents techniques and applications, and develops a framework for managing the verification process from concept to reality. Course topics include verification tools, verification languages, verification planning, stimulus and responses, system Verilog, etc.

Prerequisites & Notes

  • Prerequisites: EECE.5740 Advanced Logic Design or Equivalent.
  • Special Notes:
  • Credits: 3;

Questions About This Course?

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