Summer 2019 > Engineering/Engineering Technology > EECE.4800 > 021
Course No: EECE.4800-021; SIS Class Nbr: 3287; SIS Term: 2840
Course Status: Registration Closed
Continuation of 16.317. CPU architecture, memory interfaces and management, coprocessor interfaces, bus concepts, bus arbitration techniques, serial I/O devices, DMA, interrupt control devices. Including Design, construction, and testing of dedicated microprocessor systems (static and real-time). Hardware limitations of the single-chip system. Includes micro-controllers, programming for small systems, interfacing, communications, validating hardware and software, microprogramming of controller chips, design methods and testing of embedded systems.
Unless otherwise noted above
Every effort has been made to ensure the accuracy of the information presented in this catalog. However, the Division of Graduate, Online & Professional Studies reserves the right to implement new rules and regulations and to make changes of any nature to its program, calendar, procedures, standards, degree requirements, academic schedules (including, without limitations, changes in course content and class schedules), locations, tuition and fees. Whenever possible, appropriate notice of such changes will be given before they become effective.
The registration period for this course has ended.
Check availability for the current semester