Fall 2024
> Engineering/Engineering Technology
> EECE.5690
> 031V
Course No: EECE.5690-031V; SIS Class Nbr: 13585; SIS Term: 3410
Course Status: Registration Closed
Course Description
Introduction to CMOS circuits including transmission gate, inverter, NAND, NOR gates, MUXEs, latches and registers. MOS transistor theory including threshold voltage and design equations. CMOS inverter's DC and AC characteristics along with noise margins. Circuit characterization and performance estimation including resistance, capacitance, routing capacitance, multiple conductor capacitance, distributed RC capacitance, multiple conductor capacitance, distributed RC capacitance, switching characteristics incorporating analytic delay models, transistor sizing and power dissipation. CMOS circuit and logic design including fan-in, fan-out, gate delays, logic gate layout incorporating standard cell design, gate array layout, and single as well as two-phase clocking. CMOS test methodologies including stuck-at-0, stuck-at-1, fault models, fault coverage, ATPG, fault grading and simulation including scan-based and self test techniques with signature analysis. A project of modest complexity would be designed to be fabricated at MOSIS.
Prerequisites, Notes & Instructor
- Section Notes: HyFlex Course; Combined with section: EECE.5690.201P.
- Core Codes: STEM, HYFX
- Credits: 3; Contact Hours: 3
- Instructor: Abu Hena Muhammad Nazir Hossain
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Textbook Information
When Offered & Tuition
- T | 6:30 PM-9:20 PM ET Online
- 2024 Fall: Sep 04 to Dec 20
- Course Level: Graduate
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Tuition: $2250
- Note: There is a $30 per semester registration fee for credit courses.
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