Fall 2024
> Engineering/Engineering Technology
> EECE.5821
> 031V
Course No: EECE.5821-031V; SIS Class Nbr: 13588; SIS Term: 3410
Course Status: Registration Closed
Course Description
Structure of computers, past and present: first, second, third and fourth generation. Combinatorial and sequential circuits. Programmable logic arrays. Processor design: information formats, instruction formats, arithmetic operations and parallel processing. Hardwired and microprogrammed control units. Virtual, sequential and cache memories. Input-output systems, communication and bus control. Multiple CPU systems.
Prerequisites, Notes & Instructor
- Prerequisites: Students with a CSCE career need permission to take Graduate Level Courses.
- Section Notes: HyFlex Course; Combined with section: EECE.5821.201P.
- Core Codes: STEM, HYFX
- Credits: 3; Contact Hours: 3
- Instructor: Lewis Tseng
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Textbook Information
When Offered & Tuition
- W | 3:30 PM-6:20 PM ET Online
- 2024 Fall: Sep 04 to Dec 20
- Course Level: Graduate
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Tuition: $2250
- Note: There is a $30 per semester registration fee for credit courses.
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