Computer Architecture and Design

Spring 2025 > Engineering/Engineering Technology > EECE.5821 > 031V

Course No: EECE.5821-031V; SIS Class Nbr: 13532; SIS Term: 3430
Course Status: Open

Course Description

Structure of computers, past and present: first, second, third and fourth generation. Combinatorial and sequential circuits. Programmable logic arrays. Processor design: information formats, instruction formats, arithmetic operations and parallel processing. Hardwired and microprogrammed control units. Virtual, sequential and cache memories. Input-output systems, communication and bus control. Multiple CPU systems.

Prerequisites, Notes & Instructor

When Offered & Tuition

  • Th | 6:30 PM-9:20 PM ET Online
  • 2025 Spring: Jan 21 to May 08
  • Course Level: Graduate
  • Tuition: $2250
  • Note: There is a $30 per semester registration fee for credit courses.

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