Verification of Digital Systems Lab

Course Search > Engineering/Engineering Technology > EECE.5775L

Course No: EECE.5775L-041; SIS Class Nbr: 14249; SIS Term: 3030
Course Status: Open Added 11/4/20

Course Description

This lab course is offered to provide the student with the practical skills to verify an FPGA design in simulation environment. The student will build various components of a test environment beginning with a basic testbench using manual verification and progressing to a more robust self-checking test environment. This includes generating constrained random stimulus and predicting, monitoring, and checking responses. The students will also create a regression test suite and evaluate coverage. This course will consist of seven 2-hour labs, each requiring either completion of a worksheet or a detailed report of the results.

Prerequisites, Notes & Instructor

When Offered & Tuition

  • TBD
  • Spring 2021: Jan 25 to May 08
  • Course Level: Graduate
  • Tuition: $575
  • Note: There is a $30 per semester registration fee for credit courses.

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